The present invention relates in general to fabrication methods and resulting structures for semiconductor devices. More specifically, the present invention relates to fabrication methods and resulting structures for self-limiting liners configured and arranged to increase the contact trench volume in n-type and p-type transistors.
Some non-planar metal oxide semiconductor field effect transistors (MOSFETs), such as fin-type field effect transistors (FinFETs), employ semiconductor fins and a gate structure wrapped over the sidewalls and top of a central portion of the fin. The central portion of the fin functions as the channel, and the portions of the fin that are not under the gate function as the source and the drain. Raised source/drain (S/D) regions can be epitaxially grown over the S/D portions of the fin to increase the S/D volume and provide a larger surface for interfacing with S/D conductive contacts.